AT86RF231
Section 7.2.3 “RX_AACK_ON - Receive with Automatic ACK” on page 51 and Section 7.2.4
“TX_ARET_ON - Transmit with Automatic Retry and CSMA-CA Retry” on page 64 .
Table 7-16.
TRAC_STATUS Transaction Status
Register Bits
TRAC_STATUS
Value
0 (1)
Description
SUCCESS
RX_AACK
X
TX_ARET
X
1
2
3
5
SUCCESS_DATA_PENDING
SUCCESS_WAIT_FOR_ACK
CHANNEL_ACCESS_FAILURE
NO_ACK
X
X
X
X
7
(1)
INVALID
X
X
All other values are reserved
Notes:
1. Even though the reset value for register bits TRAC_STATUS is 0, the RX_AACK and
TX_ARET procedures set the register bits to TRAC_STATUS = 7 (INVALID) when it is started.
TX_ARET
SUCCESS_DATA_PENDING:
Indicates a successful reception of an ACK frame with
frame pending bit set to 1.
RX_AACK
SUCCESS_WAIT_FOR_ACK:
Indicates an ACK frame is about to sent in RX_AACK
slotted acknowledgement. Slotted acknowledgement
operation must be enabled with register bit
SLOTTED_OPERATION (register 0x2C, XAH_XTRL_0).
The microcontroller must pulse pin 11 (SLP_TR) at the next
back-off slot boundary in order to initiate a transmission of
the ACK frame. For details refer to IEEE 802.15.4-2006,
section 7.5.6.4.2.
? Bit [4:0] - TRX_CMD
A write access to register bits TRX_CMD initiate a radio transceiver state transition:
Table 7-17.
State Control Register
Register Bit
TRX_CMD
Value
0x00
0x02
0x03
0x04 (1)(2)
0x06
0x08
0x09
0x16
0x19
State Description
NOP
TX_START
FORCE_TRX_OFF
FORCE_PLL_ON
RX_ON
TRX_OFF (CLK Mode)
PLL_ON (TX_ON)
RX_AACK_ON
TX_ARET_ON
All other values are reserved and mapped to NOP
70
8111C–MCU Wireless–09/09
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